It is important for electronic devices, that are used in industrial automation, even in everyday life to operate reliable. Digital circuits that are used in these equipments have such a high complexity that can’t be tested with traditional testbench based approaches. For this reason methods have been appeard to automate, standardize and make productive the verification process.
In this thesis I will present an 8-bit microprocessor-based system for verification using the UVM methodology and the e language. First, I will give a sort theoretical introduction about the UVM methodology and the e language. Then I will introduce the system itself that was made with the help of the VHDL hardware description language. I'm going to show the detailed structure of the verification plan and the verification environment. Finally, I will present the tests that were used during verificaion and the obtained results.
The further development opportunities and lessons learned will be discussed at the end of the study. Finally, I will summarize the tasks that were done during the one-year job.