Implementing an affine transformation core on FPGA

OData support
Supervisor:
Szántó Péter
Department of Measurement and Information Systems

In the field of video technology and broadcasting the video image is often transformed. These transformations can be among others translation, scaling or rotation. In some cases like live broadcast these tasks need to be performed in real time and require high computational load, especially on resolutions used today like Full HD or 4K. Thus a sufficient signal processing unit is needed and as my master thesis project I was working on such image transforming unit as an FPGA circuit.

Some of the applied transformations are not linear and belong to the set of affine transformations. These transformations are hard to represent in the usual two dimensional vector space. Thus homogeneous coordinates are used since this way any affine transformation can be expressed as a matrix.

The transformation of the input image is done by resampling. In order to achieve sufficient image quality filtering is needed. A pre-scaler must be used to solve the problems of oversampling and undersampling when the transformation scales the image. Since these operations require a lot of computation, a trilinear filter and a scaler based on averaging are used as trade-off.

In this application the resampling is achieved by parsing the required part of the input image. While stepping through the output image the same steps can be done in the input image. The representation of the step vectors between the input and output image is defined by the transformation matrix.

Since in these days the resoultion of an image frame is large, the frames used during the process must be written into a memory. In most cases reading the memory can not be done by long bursts and the time needed for the read operation is increased. Thus the transformation unit is assisted by a cache which contains square areas of the input image in order to ensure fast access at every reading direction.

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