Implementing complex digital design in HLS languages

OData support
Supervisor:
Szántó Péter
Department of Measurement and Information Systems

Recently, the time-to-market requirements for certain products gave high priority for significantly reducing the development time of technical equipments / consumer electronic devices.

The programming of FPGA-based designs in hardware description languages is orders of magnitude more time-consuming than to implement the same algorithm at a higher abstraction level (e.g. with C/C++ languages). Unfortunately, it is very difficult to directly generate good quality hardware from these C/C++ language descriptions. The reason is that it is really hard to develop a sufficient quality, parallel hardware structure from an essentially sequential descriptive code.

In my thesis, I examine the quality of the hardware that can be generated with the Mentor Catapult-C software from a complex algorithm implemented in C programming language. I used the MAD decoder of the company Underbit, which is capable of decoding MP3 compressed files.

Downloads

Please sign in to download the files of this thesis.