In this paper I am going to present the C to VHDL converter software I developed. I summarize the characteristics of these programming languages as well as the possibilities of translation between them. The limitations and their sources will be described. Then I present the construction of the hardware description language I used in a longer section. This includes linguistic elements, the types and proper use of them. Studying the application of control structures and knowledge of the general structure of a VHDL model are also important. I will present the conversion utility and describe its functions. The operation will be demonstrated using some algorithms written in C. Firstly, I will present simple functions, which I used to generate VHDL models. My simulation will prove the accuracy of the translation. Then my program will be used on a Fibonacci testing algorithm, this is somewhat more complex than the previously used routines. Finally I am going to evaluate the results and designate the opportunities for further development.