Development of a demonstration device for CMOS process evaluation

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Dr. Juhász László
Department of Electron Devices

By the development of technology more and more complex integrated circuits can be realized, in less and less size. Decrasing of the size brings up new troubles, which are affect the functioning of the integrated circuits. In my thesis I introduce these problems and give an overview of the rectification and mesurement methods of the faults caused by the problems by using a monitoring integrated circuit. This IC was manufactured on Berkeley Universtiy. I introduce the monitoring structures being on the chip, give a manual about their usage, and the covered fault facilities. The next chapter in my thesis is about the faults, caused by the careless usage of MOS integrated circuits. I also introduce a several solution realized in circuit against these faults.

In the second part of my thesis I present a holistic design and construct procedure of a demonstration device which can be used in the future by students deal with this subject. They can perform measurements to evaluate the technology and the manufacturing process between safe conditions. I also introduce the practical choosing of the examined monitoring structures as well as I summerize the most important measurement results of the semester. After all I created a user manual and a mesurement scheme to the demonstration device developed by myself.


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