Digital simulation using reactive programming

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Wacha Gábor József
Department of Measurement and Information Systems

Nowadays our digital circuits are more complex and their numbers are continuously increasing. In case of hardware systems the error handling and repairing are vital. For hardware verification we use simulators to create the software model of a hardware. The majority of hardware description simulators are written by imperative languages. These programs can’t work properly on multi-core systems, hold no possibility to parallel computing and they always run on a single thread.

The Reactive programming can be a solution to this problem. Reactive programming is a new programming paradigm oriented around data flows. Reactive systems are: responsive, resilient, elastic, and message-driven. The Microsoft has Rx.NET, which is a library for composing asynchronous and event-based programs using observable sequences.

In this work we create logic gates which input and output like a series of events using Rx.NET library. With logic gates we can create logic circuits, including adder. We compare the simulation speed of a generated adder module with a current hardware description simulator and evaluate the results. Furthermore, we create a D flip-flop, which is fundamental of sequential logic based circuits using Reactive Extensions.


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