During the last decades, power density of integrated circuits has increased to such an extent that development of new design and simulation procedures become necessary. Logi-thermal simulation makes it possible to get a picture of the temperature distributions of an IC during the early design stages. This way designers can eliminate the thermal problems at high abstraction levels, possibly reducing the number iterations in the design process and preventing malfunctions of the device.
In the first chapters of my thesis, I describe the design flow of digital systems, define the essence of logi-thermal simulation, and describe some existing logi-thermal simulators. I briefly outline the basics of the Successive Network Reduction (SUNRED) algorithm, which was used as thermal simulation engine. After that I provide insight into hardware description and modeling using the SystemC language. Then I describe the operation of the LogiTherm simulation framework, the boundary conditions and the output files.
At first I tested the simulator with a ring oscillator that I implemented in SystemC. Then I created a simple processor model, also in SystemC language. For ease of testability I implemented an assembler in C++, and using this I produced three test programs for the processor to run during logi-thermal simulations. I examined the effects of clock frequency change and different test codes on the evolving temperature distribution. I observed the transient phenomena of the chip’s average temperature and temperature difference during the simulation.
I worked on developing an algorithm to place the modules of digital circuits in an optimal physical layout. Finally, I summarize my observations and present some ideas on the future development of the LogiTherm simulation framework.