This paper presents an MSc project of which the main goal is to produce a reusable IP core block which can serve as an interface circuit for any MEMS-based smart sensor device.
The first task involves presenting a literature review on Smart Sensors, MEMS, Sensors, and methods used for simulation and design of sensor systems. The next part of work consists of perorming simulations for all the components of a basic smart sensor set-up to demonstrate methods used during design of such complex systems. The main objective is to develop an interface circuit which is reusable (meaning configurations in runtime and setting synthesis parameters are made possible), has a serial interface (UART), as well as a customised communication protocol. During the design of the circuit, it was assumed that the interface is going to be used with sensors having a frequency output.
The circuit was designed in Verilog using Quartus software. A complex exhaustive plan for verification of the circuit was also presented.