Nowadays PCIe has become the dominant standard of home and server architectures. It owes its popularity to the possibilities inherent in its structure, layered architecture, software compatibility with previous systems and significantly higher data rates at low cost. Unlike the shared parallel architectures used in previous systems, the PCIe establishes a point-to-point packet based connection. Through good scalability it not only became the basis of the high performance graphic cards, but replace almost all previous PCI, PCI-X buses.
The efficient data transfer between the processor (system memory) and the accelerator card based on FPGA is most important. The aim of the thesis is to design DMA module implemented in FPGA, which is able to make efficient use of both PCIe and external (DDR) memory bandwidth. Unit is requred to be simple and relatively efficient compared with accelerator logic.
The recently emerging „Big Data”, the field of application that require complex operations on large data sets offering new opportunities in analytics. For the purpose of demonstration of the operation of the system I implemented such a virtual screening algorithm widely used in bioinformatics.