Wigner Research Centre for Physics (Wigner RCP) is participating in the
development of CERN ALICE experiment as well as in the improvement of VHMPID
and HPTD particle detectors. My main task was to develop the firmware of the
detector’s font-end electronic card (FEE).
I designed a digital system which is implementable on a configurable FPGA.
The design supplies the main functions of FEE and I validated the proper behavior with
simulations. The Actel ProAsic3E A3P600 device was chosen for the design. The
reason for the choice is given my thesis.
The memory capacity of the chosen device generated new problems: the small
capacity of the memory does not allow to store the required amount of data in a simple
way. In the current paper I recommend not only a method for a memory compression
and but also a solution for a memory organization.
During my work I got to know the data acquisition and trigger system of ALICE
experiment, VHMPID and HPTD detectors to understand the functions of FEE.
I developed a digital system design to a non-existing FEE. Nevertheless the
developing of the digital system of the FPGA is possible in paralell with the FEE
hardware development. In addition to my original tasks the design is a potential
realization of the whole system.