Hardware accelerated algorithms in FPGA based SoC systems

OData support
Supervisor:
Szántó Péter
Department of Measurement and Information Systems

Nowadays FPGAs are used widespread in several industrial areas to execute parallel and computationally intensive tasks. These areas can be the multimedia, video analytics, networking and data transferring systems, engine controls, etc.

In most cases there is a need for a control processor apart from the FPGA acceleration. This processor is responsible for the entire system control and could compute some less intensive tasks. Generally the processor controls the FPGA accelerator modules in a synchronized way.

Due to the inseparability and higher integration of tasks there is an increasing expansion of the so-called SoCs (System on Chip) which consist of a processor core (or cores) and hard-wired FPGA logic.

I have accomplished my final thesis at Eutecus Inc. The aim of this international company is to develop video analytic systems, IPs and platforms. The main goal concentrates on automotive and non- conventional applications on standing and moving platform as well.

My task aimed at creating a frontend co- processor that was able to compute an output map real time. This map had to perform the velocity intensities and directions in the video stream.

The realisation of the algorithm could have been resolved in 3 stages. For first, an appropriate signal processing algorithm had to be found and the implementation details had to be set. Then I implemented and executed the algorithm on ARM processor. Finally I created the subsystem on the FPGA platform which was considered to be a proper submodule of the whole video analytics system.

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