Application-specific processor systems using run-time reconfigurable hardware accelerators

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Supervisor:
Dr. Horváth Péter
Department of Electron Devices

Digital circuits with conventional structure do not seem to be able to provide the appropriate level of imporvement. There is a need for a new design paradigm in order to maintain the growth of computing performance. Nevertheless, new and more complex methodologies oppose us other difficulties, that may arise from efficient and coherent design of differentiated circuit components. This means additional effort and experience during the design. These new methods could be the use of hardware accelerators and reconfigurable circuits. Both types of hardware have been available for some time, but they have become widespread nowadays.

In this paper, I review systems using hardware accelerators and implementing accelerators in reconfigurable hardware. I present the progress of implementing an application-specific system realized with a hardware accelerator in an FPGA (Field-Programmable Gate Array). After that, I create the purely software representation of the application and compare the two solutions.

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