Gigabit Data Acquisition

OData support
Supervisor:
Lazányi János Gyula
Department of Measurement and Information Systems

Summary

In data acquisition solutions there is an arising need to separate the analog input and data conversion stages from the PC. To do this an appropriate high speed interface is needed. Gigabit Ethernet was an obvious choice since it is widely available, easy to use and can provide the throughput rate required for most applications. To realize the interface a 10/100/1000 Mbps Ethernet PHY and an RJ45 connector with integrated magnetics were placed on the PCB. The Tri-mode MAC and blocks responsible for higher layers of communication were implemented in the on-board Xilinx Spartan 3A DSP FPGA. Since the components processing incoming and outgoing IP and UDP data packets are realized in FPGA logic rather than in software running on an embedded microprocessor the throughput is about the theoretical maximum in case of a single point-to-point full duplex 1Gbps link between the board and the host computer. It means that data rates similar to 33MHz 32bit PCI are achievable. In this document I'll describe how this system works

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