Design of an analog low-noise CMOS integrated amplifier circuit

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Supervisor:
Czifra Dávid Szilárd
Department of Electron Devices

My task was to prepare the corrected, integrated circuit design prototype of the analog circuit for the amplifier.

The analog circuit will be located next to a digital part-circuit and in an ASIC (Application- Specified Integrated Circuit), in which the task of the analog part is to intensify the signal of the amplifier and to execute the pre-filteration that is necessary for the analog-digital conversion (anti-aliasing filter).

The signal provided by the sensor is a low-level signal, that’s why at the planning, to ensure the good signal-noise relation, the main point was that the circuit shouldn’t emit much noise. The circuit had to be prepared against the common mode noises from the sensor, so there’s an incremental amplifier, an instrumentation amplifier (INA) located on the input of the circuit. The mutual components of the INA and the active filter scale are the asymmetric-output operational amplifiers (OPA), these produce the most of the circuit-noises, that’s why, my purpose was to design a low-noise operational amplifier (LNA).

In the first part of my work I demonstrate the chosen preamplifier and filter stage in detail, the academic background behind them, and then I’ll present the origin of the circuit noises or rather the methods to reduce them. After that I will review the contact of the operation amplifier I’ve chosen, the most important equations I used for the pre-calculations and their conclusions. Eventually I will demonstrate the steps of the planning, the results of the calculations and simulations, furthermore the layout of a functioning low-noise amplifier that I made.

The circuit had to be made with UMC180 CMOS technology, and with Cadence 5.1 program. To make the active filter stage I used the program Filter Wizard by Analog Devices.

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