As a result of technological advances, the microelectric devices and systems are becoming increasingly complex. Due to the widespread use of integrated circuits, there is a growing need to examine the possibilities of failure of these circuits. In practice, a number of regional use of these devices takes place, where you can not risk the operation of the equipment with any undetected errors in it, because the harmful effects can lead to more failure, or generate processes leading to injury. The analysis of integrated circuits produced by electrostatic discharge failure mechanisms can reduce the risk of these processes.
In my thesis I’m dealing with the electrical overstress (EOS), and in particular with the electrostatic discharge. Due to the complexity of integrated circuits, the intentional infliction, and detection of damage created by electrical discharge is a complex task. I created reproducibly detected or latent damage to the integrated circuit, and then examined, evaluated it.