PSPICE Based Design of Switched Mode Power Converter

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Supervisor:
Dr. Varjasi István
Department of Automation and Applied Informatics

Abstract

Nowadays the increasing depletion of non-renewable energy sources and the increasing demand of energy need quick solutions from the engineers of electricity sector. There are two main ways of solving these problems: reducing energy use or increasing the use of renewable energy sources. Both tasks can be solved economically with the help of modern power converters. By the development of power semiconductors the converters with former structure and function become obsolete more quickly, that is why only those converter producers can stay in the market who have both modern production technology and efficient developmental capacity.

In the first chapter of my thesis I was dealing with the types and way of use of renewable and non-renewable energy sources. It is important that the consumer gets a bigger part of power per input of the power converter, which means the increasing of the value of efficiency.

In the next chapter I dealt with Boost-converter topologies, which are very frequent in power converters, mainly in solar applications. I wrote about hard switching I have known and accomplished so far, and I got to know the accomplishment of the same converter using soft switching.

After the overview of theoretical background, the following step was the examination and analysis of a real existing model of transistors and diodes in a simulation program. Certain semiconductor factories attach to their products free and accessible for all pspice models. Before examinations I compared the behaviour of the model in the simulation program with the values written in the tools’ datasheet. My aim was making a simulation of a quick semiconductor Boost-converter as realistic as I could.

For this I used a plan of a printed circuit board previously produced in my BSc thesis, where I examined the significant parasitic effects during quick switching of semiconductors with the help of a software applying finite element method.

Finally I made a new simulation completed with these calculated parasitic inductance results. From these results we can see the finite inductance of the commutation loop and, as a consequence, the voltage overshoot.

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