Efficient realization of convolutional neural network on FPGA environment

OData support
Supervisor:
Dr. Fehér Béla
Department of Measurement and Information Systems

One possible implementation platform for convolutional neural networks in embedded app-

lications is the hardware-level programmable FPGA circuitry. Realisation of a pre-trained

system with known structure and weights means its efficient mapping to the FPGA’s comp-

utational units considering the computing and data manipulation/storing limitations. Re-

cent research shows that succesful evaluation of image recognition/classification tasks is

feasible with low-precision coefficient and data representation. Therefore, using the flexible

numeric representation abilities in the FPGAs, realizations can be very power efficient and

resource optimized. The aim of this thesis is to examine the possible results through a

chosen example network.

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