Monitoring of continuously developing networks is essential for optimization, fault management and network planning. The information retrieved from off-line analysis of traffic data helps to determine the path of future developments and to find out the weaknesses of devices and solutions residing in the network. For proper processing of traffic data it is crucial to store the packet identification parameters in the right order. Since the ordering is defined by time, the monitoring device must provide time stamping as precise as it is defined by the packet rate.
Nowadays network providers commonly use 1 or 10 Gbps Ethernet networks which are difficult to monitor properly using software-only solutions. In case of a distributed monitoring system, timestamps must be correct, since the various databases and applications storing and using the overall traffic information determine the order of packages based on timestamps. The precision of time stamping performed by software is influenced by several non-deterministic factors, such as scheduling of the kernel, congestions of packets and so on. In order to avoid these effects, hardware accelerator elements are necessary not only for capturing and time stamping the packets but for producing the time information itself as well.
In my thesis a time stamping method is introduced that has been developed for an Ethernet network monitoring product line. The members of this are FPGA based devices, thus the complete solution can be easily fitted to any FPGA-based system. In addition, considering the speed and resolution, my solution remains scalable within the limits of the current hardware.