Implementation of a MIPI CSI-2 camera interface in FPGA

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Szántó Péter
Department of Measurement and Information Systems

My thesis is about designing and implementing a MIPI CSI2, high speed camera interface on a developer board which contains a Xilinx Kintex-7 FPGA. This thesis also addresses the configuration of the camera.

The dissertation then presents the method of digital image capture by explaining the importance of CFAs, CCD and CMOS sensors, and the role of demosaicing using certain known demosaic algorithms.

After this, the thesis presents the high speed camera interface’s physical layer which is the MIPI D-PHY. It also introduces the MIPI CSI2 protocol, that is built on top of the physical layer, also explaining in detail it’s architecture and it’s properties. The thesis then describes the CCI interfaces that are required to configure the camera.

In this paper the next topic is the devices used in the implementation, including the FPGA developer board and the camera itself.

Following that, the thesis depicts the high level block diagram of the implemented design and describes it’s elements. It includes the soft core processor system, the MicroBlaze system’s hardware components and the software configuration of the camera. The dissertation inspects some demosaic algorithms’ quality and their required implementation resources, as well as the implementation of the chosen algorithm in Vivado HLS. Next the HDMI interface is discussed.

Finally, this paper presents the result of the implementation and some possibilities for improvement.


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