UVM based PCI IP verification

OData support
Supervisor:
Dr. Fehér Béla
Department of Measurement and Information Systems

The subject of this thesis is to provide insight corresponding the UVM based verification of an IP realized version of the PCI parallel system bus, which is still widely used in nowadays' high performance digital systems.

It provides a basic concept of the evolution of the Universal Verification Methodology (UVM), the development circumstances of the PCI system bus, the specialties of the Ericsson's PCI bus implementation and the standard PCI bus' signals used in the verification environment. Further topics include the possible models used in the verification process, the structure of a general and the finished verification environment, the role and the configuration possibilities of the classes and components included and the possible evaluate options. Moreover the connection requirements between the IP module and the environment are discussed, along with the used stimulation, the experienced faulty response's possible cause and the environment’s potential improvements.

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