Verification of the HDL description of an SD/MMC controller using the eRM verification methodology

OData support
Supervisor:
Nagy Gergely
Department of Electron Devices

The verification of an HDL description of a more complex digital system cannot be done properly and efficiently using traditional (HDL based) methods. Due to the high complexity of the present-day digital circuits, the amount of the internal states the module can get into is unmanageable with the methodology used by the traditional testing methods, as the number of the resulting test cases and sequences would be very high to handle, and at the same time the rate of the covered states and features would be unsatisfactory. Because of these reasons, new approaches, methodologies and tools have been developed in the recent decade for the verification of the current modern, complex circuits, and thanks to these efforts, efficient verification environments are now possible to be implemented around the HDL description of a module.

In this thesis work I performed the functional verification of a freely available and open-source OpenCores Certified SD/MMC controller module, exploring every task of the verification workflow and following the widely used UVM (Universal Verification Methodology) directions, which is based on the preceding eRM (e-Reuse Methodology) using the ’e’ hardware verification language. For the thesis work the company evosoft Hungary kft. provided me continuous consultation and professional support. The aim of this project was to gain experience from the development that can be used along with the implemented components themselves in professional verification projects too.

In this work I introduce and gather the relevant theoretical knowledge necessary to understand the project and then I give detailed descriptions of the steps of the development, starting with the introduction of the SD controller and the creation of the verification plan, proceeding with the implementation of the three types of verification components (e Verification Component, eVC), and finally the used test cases and regression run analysis. I also summarize the results of the whole verification project, with the found bugs and shortcomings of the module and I also review the efficiency of the used methodology.

Downloads

Please sign in to download the files of this thesis.