The increasing utilization and steadily enhancing functionality of digital devices is noticeable in everyday life. This development is enabled by Systems-on-Chips (SoCs) that comprise various computational building blocks, memories and on-chip communication. Increasing demands like shorter time-to-market and shorter time-on-market, and the continuous development of technology requires the replacement of fixed function and less reusable ASICs by devices with much more flexibility, while not giving up much of the performance and efficiency that ASICs offer. This lead to the development of Application-Specific Instruction Set Processors (ASIP). These microprocessors have an instruction-set and microarchitecture optimized for a certain type of task, combining the flexibility of general purpose processors and performance and efficiency of ASICs.
My task has been to develop an accelerator circuit for an accelerator-based ASIP called mephisto, which was provided by the department. The chosen field of application is spectral analysis.
During my work I have developed a functional simulator in C++, which simulates all instructions of mephisto and also includes the accelerator, which implements Fast Fourier-Transform (FFT). The model is written on a high abstraction level but is able to run programs written in assembly, so it is possible to develop programs without implementing them on hardware and performing RTL simulations, which would take a lot of time compared to the development with the help of the functional simulator.
During the second part of my work I have implemented the accelerator in VHDL and built it into the RTL description of mephisto. To verify the proper operation of the accelerator I have performed logic simulation using linear testbench, then I examined the resource usage of FFT implementations with varying sizes. To measure the level of acceleration provided by the accelerator, I have written three test programs in assembly, then I have analysed the results in different aspects.