Nowadays there is a growing demand for high-performance processors. The instruction-level parallelism technique is an efficient method for increasing the performance of the processors. Superscalar processors are able to apply these techniques efficiently. My thesis deals with the design issues of the superscalar processors.
In my work I first did a thorough research in the special literature in relation to the given topic. Among other things I made myself familiar with the characteristic features of the superscalar microarchitectures. During my research in the special literature I dealt with the detailed analysis of the Tomasulo algorithm which laid the fundamentals of the superscalar processor design.
During the specification of the concrete system my aim was to design such a system which is able to present the characteristic features of the superscalar processor architectures. The designed system is based on the Tomasulo algorithm. During the designing of the system I used a similar themed project as a starting point. I made significant corrections and changes on this one. Beside these I also developed the system further. I carried out the designing of the specified system on the Verilog hardware description language.
I tested the operation of the system both during the designing process and after finishing the designing process. I documented the conclusions which I had drawn during the tests for possible further development.