In semiconductor manufacturing process under industrial conditions a critical task is to reach as large yield as possible. Therefore it becomes necessary to control technological processes and examine electrical characteristics of the finished semiconductor devices. For this purpose, it is usual to use so-called test-structures and test-chips. In case of technological development also the new design rules just like the technological and device parameters are determined and optimized by using a test-structure. However is the precise knowledge of the parameters and limitations of the technology used in the production an important aspect which should not be underastimated even in smaller, research-based laboratories or in those operated for educational purposes.
The purpose of my thesis is to systematize process control and rating structures used in semiconductor integreted circuit technology and to summarize the research results achieved in the BME Department of Electrondevices earlier on this subject. Using this information I have designed and drawn with the particular mask making technology the layout of a test-chip which can be used for complete qualification of technological processes carried out in the cleanroom laboratory of the department. On this basis can be produced a high-quality chrome mask set. Later, on the basis of the masks and the documentation – which contains the technological sequence of steps necesseary to use the masks – can be created the chip suitable for qualifying the laboratory.