Investigating Via-in-Pad joints with simulation techniques

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Supervisor:
Dr. Géczy Attila
Department of Electronics Technology

Today’s electronic devices had significant size reduction recently due the different technological developments. Via in Pad technology belongs to one of these improvement solutions, with the purpose of PCB size reduction. During the progression there are new failure sources revealed. One of these phenomenons is the formation of voids induced by electromigration. The computer industry has also affected by the new technologies, that made endless possibilities to the computer aided programs, like CAD and multyphysics simulation softwares.

During my work I gathered informations about electromigration, Via in Pad technology, finite element analysis and multiphysics simulation softwares. After that I created a 3D Via in Pad model in a multihpysics program and made current density simulations, with the purpose to illustrate the current density distribution affected by the technology drawbacks and determine the risk of electromigartion caused by it. The second part of my task was to prepare and accomplish an experiment to verify the simulation results.

The goal of my MSc thesis is to familiarize the readers with the Via in Pad technology, the possibilities of simulation analysis, and draw attention to the electromigration failure risks.

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