Nowadays, the FPGA technology is developing in a very high rate, including the complexity and the speed of these devices. Because of this we use FPGA circuits more often, especially in applications where the problem requires high calculation capacity, and therefore a parallel hardware architecture.
One of these problems is the real time video processing including the video rescaling. According to this we may use an FPGA circuit to implement a video rescaler hardware architecture.
My B.Sc. thesis is about the design and the implementation of a video rescaler unit. The first part of the essay is about the theory of designing a rescaler, and also shows the various rescaling methods. The second part displays the designed hardware itself, the problems during the design process, the solutions for these problems, and the explanation for the solutions.
As the closure of my thesis I show the hardware architecture which can be used to test the previously designed video rescaler module in an FPGA circuit.