Intelligent cameras are one of today's main areas of video and imaging applications, and they are in the focus of heavy research and development work. These devices are intended to process the recorded video data in place, and to forward a significantly smaller amount of derived data to other layers of the system. Depending on the requirements, intelligent cameras often have to process medium or high-resolution images, and execute computationally expensive image processing algorithms, while the overall cost and power consumption naturally remains a significant design aspect. Heterogeneous hardware platforms based on System-on-Chip technology are likely to provide a solution for these problems.
Pedestrian detection is a flagship of object detection research, and possesses an ever increasing popularity - especially in the last decade. Some methods are already applied in practice, and have high-quality open source implementations. While real-time execution times are reached (without the loss of accuracy) using common desktop computers, embedded platforms still require the careful tuning of detection accuracy, algorithmic simplifications, and resource utilization to meet design requirements of an intelligent camera.
This thesis discusses the development steps of a prototype of a pedestrian detection system, which utilizes a chip from the Xilinx Zynq-7000 family of devices. The Zynq-7000 architecture is built around a dual-core ARM Cortex-A9 application processor and a Xilinx 7-series FPGA. The thesis details the algorithm evaluation and selection, the specification and implementation of an accelerator, and the piecing together of the whole design.