Utilizing the spectral properties of the data flow graph in system level synthesis

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Dr. Rácz György
Department of Control Engineering and Information Technology

Multiprocessing is a general feature of complex digital systems. The growing complexity and quantity of the tasks to be solved often cause difficulties during the design. The solutions are not unambiguous or not deterministic. There may be inconsistency or contradictions of the requirements (costs, speed, power-demand, communication-efficiency, pipelining, paralel processing, etc.). In fulfilling the requirements or in partially dissolving the contradictions, the designer often cannot avoid the intuitive design steps for constructing the system architecture. These lead generally to the formation of a feasible, so-called heterogeneous multiprocessing architecture (HMA). Besides general-purpose CPUs or cores, the component processors of such systems may be efficient specific-purpose processors (e.g. DSPs, GPUs, FGPAs) or various special hardware units. The hierarchy of the component processors and the communication system between them are definitely determined by the requirements and their priorities.

During developing a HMS system, the designer may apply various high level logic synthesis tools (HLS) and decomposition algorithms for generating proper subtasks. These may influence significantly the cost and performance of the system to be designed. By applying the HLS and decomposition algorithms, the designer can more easily make well grounded decisions in evaluating the alternative solutions and in selecting from the optimum-close solutions.

The aim of this diploma work is to present how to the use the spectral properties of the dataflow-graph in the design steps for preliminary decomposition, loop handling and scheduling. The design steps are embedded in the DECHLS methodology developed by the Digital Systems and Applications Group of the Department of Control Engineering and Information Technology (Faculty of Electrical Engineering and Informatics, Budapest University of Technology and Economics). Besides the software implementation and testing of the design steps, the solution of an industrial control benchmark is also a purpose of this work.


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